Computers

Adaptive Techniques for Mixed Signal System on Chip (The by Ayman Fayed

By Ayman Fayed

This e-book is dedicated to the topic of adaptive innovations for clever analog and combined sign layout wherein totally useful first-pass silicon is feasible. To our wisdom, this is often the 1st e-book dedicated to this topic. The innovations defined should still bring about quantum development in layout productiveness of advanced analog and combined sign structures whereas considerably slicing the spiraling bills of product improvement in rising nanometer applied sciences.

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Extra resources for Adaptive Techniques for Mixed Signal System on Chip (The International Series in Engineering and Computer Science)

Example text

The main disadvantage is the distortion introduced at the outputs due to the presence of common-mode voltage in the transconductance formula. This is particularly a problem if the input signal has a time-variable common-mode. On the other hand, the circuit has the advantage of being capable of providing multiple output terminals by simply tapping off more current mirrors from M3 and M4, which could save a lot of die area and power consumption. Figure 2-10a shows an example of a transconductor based on the saturation-mode MOSFET transistors16,17,18.

00 300m Differential Input (V) -300m 600m 900m Figure 3-14. DTE of transconductors in Fig. 3-1 and 3-2 at 1V control voltage. 110u Transconductance of the circuit in Fig. 3-2 100u 90u Transconductance (A/V) 80u 70u Transconductance of the circuit in Fig. 4 Figure 3-15. Gm versus control voltage of transconductors in Figs. 3-1 and 3-2. 3. 2 55 Comparators Comparators are very important building blocks in many analog and mixed signal systems, where they mainly serve as an interface between the analog and the digital domain.

3-2 reduces the input-referred noise power by a little less than a half due to its double input stages. 50 40 Differential Transconductance Error for the circuit in Fig. 0 -10 -20 Differential Transconductance Error for the circuit in Fig. 00 300m Differential Input (V) 600m 900m Figure 3-12. DTE of transconductors in Fig. 3-1 and 3-2 at 100 mV control voltage. 0 Differential Transconductance Error for the circuit in Fig. 0 Differential Transconductance Error for the circuit in Fig. 00 Differential Input (V) 300m 600m 900m Figure 3-13.

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